The electronics industry continues to rely upon advances in semiconductor technology to realize higher-functioning devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon wafer. As the number of electronic devices per given area of the silicon wafer increases, the manufacturing process becomes more difficult.
A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. Such silicon-based semiconductor devices often include metal-oxide-semiconductor (MOS) transistors, such as p-channel MOS (PMOS), n-channel MOS (NMOS) and complimentary MOS (CMOS) transistors, bipolar transistors, and BiCMOS transistors.
Each of these semiconductor devices generally includes a semiconductor substrate on which a number of active and passive devices are formed. The particular structure of a given active device can vary between device types. For example, in MOS transistors, an active device generally includes source and drain regions and a gate electrode that modulates current between the source and drain regions. Passive on-chip devices, such as capacitors and resistors, are typically strategically placed to interact with the active devices.
One important step in the manufacture of such devices is the formation of capacitors as a closely integrated part of the semiconductor device. Passive on-chip capacitors are desirable components four analog or mixed-signal circuit designs. In a CMOS based technology, capacitors are generally made using the MOS gate itself, with poly and substrate acting as the two electrodes and gate oxide as the dielectric.
There are at least two drawbacks of such gate capacitors. First, gate capacitors directly use the silicon real estate and thus increase the chip size and cost. Second, gate capacitors are not inherently passive, since the capacitance is dependent on the gate voltage the capacitance value may vary. Alternatively, capacitors could be made at the interconnect levels, where there often are spaces to accommodate extra elements without increasing the silicon area. Capacitors made of metal pieces would be truly passive with constant values. One possible structure of interconnect capacitance consists of two parallel metal lines with dielectric between them. A problem with this approach is that the spacing between two metal lines generally has a minimum value defined by the process technology. Disadvantageous to the relatively small chip area, without reducing the inter-metal spacing, long metal lines have been typically required to achieve sufficient capacitance values.
Accordingly, there is a need for semiconductor structures, and manufacturing processes therefor, that overcome the aforementioned disadvantages of the prior art.